Communication systems are often limited in terms of transmitter power and spectrum availability. For these and other reasons, it is often a goal of digital communications design to maximize the transmission bit rate R and minimize the probability of bit error, or Bit Error Rate (BER), for a given system power S, and bandwidth B. The minimum bandwidth (BW) required to transmit at rate (R) is known to be Rs/2, where Rs is the symbol rate. A limit on the transmission rate, called the system capacity, is based on the channel BW and the signal to noise ratio (SNR). This limit theorem, also called the Shannon Noisy Channel Coding Theorem, states that every channel has a channel capacity C which is given by the formula, C=BW log2 (1+SNR), and that for any rate R<C, there exist codes of rate RC which can have an arbitrarily small decoding BER.
For some time, the digital communications art has sought a coding/decoding algorithm which would reach the Shannon limit. Recently, coding/decoding schemes, called “Turbo Codes,” have been determined to achieve fairly reliable data communication at an SNR that is very close to the Shannon Limit for modulation constrained codes.
One form of turbo decoding operates upon serial concatenated codes. Not all of such serially concatenated codes are iteratively decoded in practice, however. As an example, a serial concatenation of an outer, block code—such as a Reed Solomon code—and an inner, convolutional code, can be found in many communications and data storage applications requiring very low bit error rates. This type of serial concatenation is used, for example, in DBS (Direct Broadcast Satellite) standards. However, in practice, this serial concatenated code is not iteratively decoded.
One such serial concatenated system 100 is illustrated in FIG. 1. The serial concatenated system 100 includes a transmitter portion 102 for communicating encoded information to a receiver portion 104 via a communication channel 106. The transmitter portion 102 uses an outer code encoder or block encoder 108 (e.g., a Reed-Solomon encoder) to encode input bits. The output of the outer code encoder 108 is then provided to an interleaver 110 wherein the signal bit order is shuffled in a predetermined manner. Next, the output of the interleaver is provided to an inner code encoder (e.g., convolutional encoder) 112. The output of the inner code encoder 112 is then sent to a bit-to-constellation mapper, modulated by modulator 114 and transmitted over the communication channel 106 to the receiver portion 104 for decoding and processing.
Once demodulated by demodulator 116, the classical approach for decoding a serial concatenated system 100 is to apply a soft-decision inner code decoder (e.g., Viterbi decoder) 118 that receives as inputs soft symbols and outputs hard bit estimates for the inner block code. The outputs of the inner code decoder 118 are then byte-deinterleaved by deinterleaver 120 and provided to an outer code decoder 122 (generally a block decoder such as a Reed-Solomon decoder) that can correct multiple byte errors in a block. If the outer code decoder 122 indicates that the number of errors is beyond its correction capability, it may indicate so and no corrections are made.
In effect, this classical approach to concatenated decoding decomposes the task into two independent procedures: one for the inner code, and another for the outer code. An “optimal” decoder is then selected and applied for each of these procedures. However, although each decoder may be optimal for its specific task, the overall composite system may not be optimal for a given concatenated code. This is because (1) the Reed-Solomon decoder uses hard—rather than soft—decision data, and (2) the Viterbi decoder performance could be improved in a second pass decoding operation. In particular, error bursts, which are observed in the first-pass decoding, could be broken up by using the bit decisions from blocks which were successfully decoded by a Reed-Solomon decoder. This operation would, in turn, impact a second-pass Reed-Solomon decoding of the data, perhaps enabling the Reed-Solomon decoder to correct another block that previously was considered uncorrectable. In principle, the sharing of outer-to-inner code decoding information could be re-iterated, resulting in even further improvements. In fact, this technique is similar to turbo decoding in a parallel or serial concatenated code context, with bit-by-bit maximum a posteriori probability (MAP) decoding.
Various iterative (turbo-like) decoding approaches have been used in simulation to decode serial concatenations of convolutional and Reed-Solomon codes. One problem in such decoding processes is determining how the Viterbi algorithm is to be modified to accommodate inputs from Reed-Solomon decoded blocks that are correct. One attractive approach involves finding a method that efficiently forces a Viterbi decoder to constrain certain locations in a data record to desired output logic levels.
As previously indicated, the aforesaid serial concatenation of a Reed Solomon and a convolutional code can be iteratively decoded. However, better results are achievable if the component codes are specifically designed with the iterative decoding process in mind. ‘Turbo codes’ are examples of such codes.
A limitation of conventional turbo decoders is the inability to reach very low bit error rate (BER) floors; this inhibits their broad application to video transport, which requires very low BERs. One approach employed in the art to try to reduce the BER floor has been geared towards choosing good codes and topologies. These approaches try to make more efficient the already existent methods of trying to perform turbo decoding, but sometimes practical implementations that achieve the desired level of performance are difficult to find. For this reason, the serial concatenation of an additional, external decoder, such as a Reed-Solomon decoder, is sometimes used in an attempt to drive the BER floor lower. For some applications, whereby only the turbo code is used, one may not be able to achieve sufficiently low BER floors as desired or required within a given application.
Further limitations and disadvantages of conventional and traditional systems will become apparent to one of skill in the art through comparison of such systems with the present invention as set forth in the remainder of the present application with reference to the drawings.